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Low-Power Module SDRAM DIMM Routing Guidelines
The purpose of this application note is to define the routing guidelines for SDRAM DIMM memory systems in Low-Power Module/Intel® 440BX AGPset systems. The routing guidelines are specified in pre-layout simulation results only. Post-layout simulations and post-silicon signal integrity analysis are not available to correlate with pre-layout simulation results. When following these guidelines, it is recommended that the developer simulate these signals for proper signal integrity, flight time and cross talk. Note: The guidelines in this application note are based on 100 MHz SDRAM DIMM designs; however, the same guidelines apply to 66 MHz SDRAM DIMM designs.
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