This document clarifies the 28F008SC timing specification "tAVEL" and describes the duration of this spec.
Problem:Note: Intel does not control the content on other companies' Web sites or endorse other companies supplying products or services. Any links that take you off of Intel's Web site are provided for your convenience.
The timing diagrams encourage switching CE# only after addresses are stable. Timing spec "tAVEL" describes approximately how long the address has to be stable before CE# is switched. If the timing is taken into design considerations, it can add considerable time to read data. in addition, documentation does not specify the "tAVEL" duration.
Solution: CE# can go low prior to, at the same time as, or after address stable. Although the timing diagrams encourage switching CE# only after addresses are stable, this need not be the case. This time is essentially zero (tAVEL = 0s [max]).
