The 82c55A-2 PROGRAMMABLE PERIPHERAL INTERFACE uses internal port-hold devices to maintain the logic level of its port pins. This eliminates the need for external pull-up resistors to terminate unused port pins. Port-A has both pull-up and pull-down devices, while Port-B and Port-C have only pull-up devices.

The port-hold devices sink or source current within the limits of IPHH( port hold high leakage current) and IPHL ( port hold low leakage current) specifications. The port-hold high (IPHH) pull-up device will source current and the port-hold low (IPHL) pull-down device will sink current. The pull-up devices on all ports are turned on at power-up during reset. Subsequent low logic levels on a Port-B and Port-C pin will turn off that pin's pull-up device until another reset is executed. Once the pull-up device is turned off the pin will not source current in excess of the input leakage specification (IIL). The pull-up and pull-down devices on Port-A will turn on in response to a logic-1 and logic-0 respectively.The Port-A pins will always source or sink the current specified by IPHH or IPHL.

The current necessary to overcome the port-hold devices is defined by the IPHHO and IPHLO specifications. External devices will be needed to source or sink these current specifications in order to turn off the internal port-hold devices. For example, if a pull-up device sources 300uA when active, it will require an external device to sink 350uA minimum to turn off that pull-up.

Note: The port-hold devices on the 82c55A-2 are intended to maintain the logic level of unused pins. Port pins loaded with more than 20pF of capacitance may not have their logic level guaranteed following a reset. When using the 82c55A-2 in an NMOS system, the internal port-hold devices will not eliminate the need for pull-up resistors.

Ta = 0 to 70 degress C (-40 to 85 degrees C for Extended Temperature)
Vcc = +5V +/-10%