How to Measure RDRAM* System Clock Jitter

Application Note AP- 667

Making optimal system level jitter and timing measurements within the RDRAM* channel is difficult. The intent of this applications note is to document a ?best known method? (BKM) for making repeatable and accurate timing measurements for the Direct Rambus Clock Generator (DRCG) and derivative devices. This is not the only method to produce satisfactory results, but provides a solid set of guidelines and baseline information to make the measurement and validation task easier.

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