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Intel® IOP310 I/O Processor Chipset
Intel® IOP310 I/O Processor Chipset with Intel XScale® microarchitecture — Delivers Core Performance Breakthrough

Intel® 80200 Processor
32-bit high-performance CPU (400, 600, 733 MHz) based on Intel XScale® Microarchitecture
ARM* v.5TE compliant
Intel® Superpipelined RISC technology — high core speeds with low power
32 KB data and instruction caches
2 KB Mini data cache for accelerated streaming
Intel® 80312 I/O Companion Chip
Integrated 64-bit, 66 MHz PCI-to-PCI bridge (PCI 2.2 compliant)
100 MHz internal bus for up to 800 Mbytes/second bandwidth
Integrated Memory Controller supports 100 MHz SDRAM (up to 512 Mbytes)
1 KB programmable Application Accelerator Unit to speed parity generation
Added feature integration: 6 secondary PCI output clocks, 4 SDRAM output clocks, 8 general-purpose I/O pins
First Product Based on Intel XScale® microarchitecture
The Intel® IOP310 I/O processor chipset is Intel's first product based on Intel XScale® microarchitecture. This new technology provides over a seven-fold increase in core speed over previous I/O processor generations! Thanks to the Intel XScale microarchitecture, developers of a variety of Internet applications can optimize the needs from ultra-low power to high performance processing. This new microarchitecture is compliant with the ARM* version 5TE instruction set (excluding the floating point instruction set).

Product Overview
The Intel IOP310 I/O processor chipset with Intel XScale technology is Intel's first of a new generation of I/O processors. The Intel IOP310 chipset contains two devices, the Intel 80200 processor based on Intel XScale microarchitecture, and the Intel 80312 I/O companion chip. The combination of these two products constitutes a fully validated I/O processor chipset solution. I/O processors are used in many applications to increase I/O subsystem performance. Intel's IOP310 I/O processor chipset with Intel XScale technology becomes the price/performance leader in Intelligent RAID applications. I/O processors are used in internet storage applications (SCSI, Fibre Channel, SAN), networking (LAN, ATM, Ethernet, Switches, Routers), workstations, and various embedded applications, that require high-performance I/O subsystems. The Intel IOP310 chipset brings a dramatic increase in overall I/O system performance. The huge increase in core performance paves the way for extremely complex applications – especially applications that require processor intensive calculations. When used in a server or workstation motherboard, the Intel IOP310 provides the added system benefit of offloading the host CPU from low-level interrupts.

The Intel IOP310 I/O processor chipset encompasses a majority of industry standards including the latest PCI, I2O* architecture and power management standards. The Intel IOP310 chipset provides an integrated 66 MHz, 64-bit PCI-to- PCI bridge. The internal bus speed is 100 MHz – providing internal bandwidth up to 800 Mbytes/ second. The SDRAM memory controller supports 100 MHz memory. The memory controller supports up to 512 Mbytes of SDRAM. Six secondary PCI output clocks, 4 SDRAM output clocks, and 8 general purpose I/O pins are included – reducing board cost, easing designs, and saving money.

As system demands rapidly increase, greater I/O throughput becomes a necessity. The Intel® I/O processor family, beginning with the Intel® i960® Rx I/O processors, then the Intel® 80303 processor, and continuing with the introduction of the Intel IOP310 chipset, aids the developer in accomplishing a marked increase in overall system performance. The Intel IOP310 I/O processor chipset with Intel XScale microarchitecture provides breakthrough technology with breakneck core speeds, continuing Intel’s vision of improving I/O performance on current server platforms, and new server technology based on the Intel® Pentium® III, Xeon®, and Itanium™ processors.

The Intel IOP310 I/O processor is included in the Intel® Internet Server Storage Controller solution.

The Intel® 80200 Processor – Greater I/O Performance Through Faster Cores
The Intel 80200 processor based on Intel XScale microarchitecture will be released with three speed grades: 400 MHz, 600 MHz and 733 MHz. This will allow developers to balance performance with power consumption. Even at 733 MHz, the Intel 80200 processor is expected to dissipate less than 1.3 watts! This is accomplished using the Intel® Superpipelined RISC Technology – the 7-stage integer, 8-stage memory superpipelined core achieves high speed and ultra-low power across a wide operating spectrum.

Not only does this processor have great core speeds, but also 32 Kbyte data and instruction caches. A 2 Kbyte mini-data cache is also included to help avoid "thrashing" of the data cache for frequently changing data streams. The combination of speed and larger caches allows users to implement complex applications and processor intensive calculations like audio encode/decode or video compression/decompression.

The Intel 80200 processor based on Intel XScale microarchitecture is code compatible with the Intel® StrongARM SA-110 processor. It is also compliant with ARM v.5TE ISA, so users can maximize code density. The ARM v.5TE ISA executes either a 32-bit ARM instruction set or a 16-bit Thumb* instruction set.

Intel® 80312 Companion Chip – PCI and Internal Busses Get a Speed Boost
The Intel 80312 I/O companion chip integrates a 66 MHz PCI-to-PCI bridge. This doubles the speed and bandwidth from previous generation IOPs, greatly improving I/O system performance. The bandwidth of the Intel 80312 PCI busses can be up to 528 Mbytes/second. The 66 MHz bridge is backward compatible with 33 MHz PCI. The PCI busses can both be run at 33 MHz (for loading reasons), or if necessary, a user could run the primary PCI bus at 66 MHz and the secondary bus at 33 MHz (for legacy 33 MHz parts). It is left to the system designer to decide the best configuration.

Another added benefit over previous I/O processor generations is the increase in the internal bus speed. Now data can move at a rate of up to 800 Mbytes/second, a 33% increase over the past generations. Not only do all of the blocks attached to the internal bus benefit from the added bandwidth, the Memory Controller Unit runs 100 MHz SDRAM at full speed.

Intel® Intel IOP310 I/O Processor Block Diagram

More Added Features
The 80312 I/O companion chip has other performance enhancing, cost and time reduction features. The size of the Application Accelerator Unit is enlarged to 1 KB and is programmable for either 512 bytes or 1 KB. Eight GPIO (general-purpose I/O) pins have been added which can reduce chip count. Other potential cost and time saving integration includes 6 secondary PCI clocks and 4 SDRAM clocks. SDRAM memory capacity has been quadrupled – up to 512 Mbytes of 100 MHz SDRAM.

Intel IOP310 Delivers Breakthrough Performance
The Intel IOP310 I/O processor chipset with Intel XScale technology takes I/O performance to new levels. 733 MHz core performance coupled with 100 MHz SDRAM and an integrated 66 MHz PCI-to-PCI bridge opens the gate to highest system performance.

FEATURES BENEFITS
Intel XScale® Core High-performance with ultra-low power
400, 600, 733 MHz core speed
D-cache, I-cache 32 KB
100 MHz internal/memory bus
66 MHz 64-Bit PCI-PCI bridge
Exceeds SCSI U3 bandwidth requirements
Excels in core intensive applications
~ 300% performance increase over previous I/O processor ‡
8 GPIOs
6 secondary PCI clocks
4 SDRAM output clocks
Reduces chip count
Saves board space
Simplifies design
~ $10 savings on clock chips alone
Up to 512 MB memory support 4 X increase in total memory capacity
Newer SDRAM technology support (128, 256 Mb) Cost savings due to “commodity” memory pricing
‡ Estimated performance. Performance may vary depending upon a variety of factors.

Intel I/O Processor Comparison

  Intel® IOP310 I/O Processor chipset Intel® i960® RN I/O Processor
Processor Core Up to 733 MHz 100 MHz
Intel® XScale® Core i960® processor
32 KB data and instruction cache 16 KB data cache, 4 KB instruction cache
2 KB mini data cache N/A
PCI-to-PCI Bridge 66 MHz bus, 64-Bit 33 MHz bus, 64-Bit
6 secondary PCI output clocks None
256 bytes upstream delayed read completion queue 128 bytes upstream delayed read completion queue
Memory Controller 100 MHz SDRAM 66 MHz SDRAM
Up to 512 Mbytes of 64-bit SDRAM Up to 128 Mbytes of 64-bit SDRAM
Supports 64-bit (8-bit ECC), PC100 Unbuffered DIMMs and devices on board Supports 32- and 64-bit memory
ECC always on ECC off option
4 SDRAM output clocks DCLKOUT for external buffer
Internal BUS 100 MHz (800 MB/sec) 66 MHz (528 MB/sec)
ATU 256 Byte Inbound Queues 128 Byte inbound queues
Application Accelerator 512 - 1 Kbytes (user programmable) 128 bytes
General Purpose I/O 8 GPIO pins None

 
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