Intel® Xeon® Processor with 512 KB L2 Cache and Intel® E7500/E7501 Chipset Compatible Platform Design Guide for Embedded Applications
This document is an addendum to the Intel® Xeon® Processor and
Intel® E7500/E7501 Chipset Compatible Platform Design Guide
(order number 251929). It contains applied computing specific guidelines,
such as uni-processor design guidelines angled Double Data Rate (DDR)
connector guidelines and single channel DDR guidelines.
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