Set Up Procedure for Performance Characterization Results: Benchmark to Demonstrate Improvement in SIP Performance for IMS, Powered by Dual-Core Intel® Xeon® Processors
This document provides the detailed technical information necessary to
understand test parameters and results characterizing single board
computer (SBC) performance for IMS workload based on SIP transactions.
SIP testing was performed to determine a relative comparison of single
board computer (SBC) performance reflecting the performance of the
microprocessor, memory architecture, and compiler of a computer system
on compute-intensive, 32-bit applications.
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