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Click to Enlarge      IXP1200 Programming
The Microengine Coding Guide for the Intel® IXP1200 Network Processor Family
by Erik J. Johnson and Aaron Kunze

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MicroACE Test Framework
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This book shows software engineers how to program the microengines of Intel's IXP12xx network processors. Assuming no particular background or experience with the IXP12xxarchitecture, the book begins with an explanation of the hardware and development environment. You get an explanation of the right, and sometimes the wrong, approaches to programming the microengines through a series of expanding examples, such as:

Receiving and transmitting packets
Synchronizing between hardware threads: the non-preemptive microengine thread arbiter, shared variables, atomic memory operations, inter-thread signals, and SRAM CAM locks
Using the hash unit and cyclic-redundancy check instructions
Writing MicroACEs

The programming examples are written in structured microC "microblocks," with microengine assembly code used occasionally for illustration.

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