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Intel® E7525 Memory Controller Hub Chipset
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Intel® E7525 Memory Controller Hub ChipsetIntel® E7525 Memory Controller Hub (MCH) chipset, the next generation Intel® dual-processor (DP) workstation and server chipset technology, offers increased graphics performance, reduced power consumption, and improved platform reliability and system manageability.

These new dual-processor workstations deliver outstanding performance, dependability and value to digital content creation, Mechanical Computer Aided Design (MCAD), electronic design automation, and other graphics workstation applications.

Download Product Brief [PDF 625KB]
Motherboard and Barebones Selector Guide
Workstation Chipset Comparison Chart
Intel® E7525 Chipset Features
Features Benefits
Supports 2 Intel® Xeon® processors over an 800 MHz system bus for dual-processing workstation and server systems Optimized performance for the DP workstation market segment with a range of price points.
800 MHz system bus capability Increased bus bandwidth (50% greater than 533 MHz) and increased system bandwidth.
Dual-channel DDR2-400
Offers a maximum memory bandwidth of 6.4 GB/s.
Decreased power consumption—especially important in dense rack, HPC and blade configurations .
Increased DIMMs per system provide enhanced memory scalability for memory-intensive applications.
PCI Express*1 4 X-16 graphics Next generation graphics interface, delivers 4.0 GB/s of graphics bandwidth per direction directly into the Intel® E7525 MCH chipset (total bandwidth 8 GB/s), for twice the bandwidth of AGP 8X.
PCI Express* I/O Serial I/O technology provides a direct connection between the MCH chipset and PCI Express* component/adapters with bandwidth up to 4 GB/s on each PCI Express x8 interface. PCI Express offers higher bandwidth, lower latency and fewer I/O bottlenecks than PCI-X.
Intel® 6700PXH 64-bit PCI Hub
Optional component introduces next-generation PCI/PCI-X performance and significant enhancements to platform flexibility.
Supports 2 independent 64-bit, 133 MHz PCI-X segments and two Hot-Plug controllers (one per segment).
Advanced platform RAS
Features such as memory Error Correction Code (ECC), Intel® x4 Single Device Data Correction (x4 SDDC)2, DIMM sparring, DIMM scrubbing and memory mirroring can improve system reliability.
32-bit CRC on PCI Express*.
SMBus port hooks into Intel® E7520 and Intel® E7320 chipsets for remote management operation and support for variety of third-party Base Management Controller (BMC) and BIOS solutions.
Intel® Hub Interface 1.5 connection to the MCH chipset Point-to-point connection between the MCH chipset and the Intel® 82801ER I/O controller hub or Intel® 6300ESB I/O controller hub devices provides 266 MB/s of bandwidth.
Related Products
Processors Intel® Xeon® Processor
Chipsets Intel® E7520 and E7320 Chipsets
Packaging Information
Product Package
Intel® E7525 Memory Controller Hub (MCH) chipset 1077 Flip Chip-Ball Grid Array (FC-BGA)
Intel® 6700PXH 64-bit PCI Hub 567 Flip Chip-Ball Grid Array (FC-BGA)
Intel® 82801ER (ICH5R) 460 Micro Ball Grid Array (µBGA)
Intel® 6300ESB I/O Controller Hub 689 Plastic Ball Grid Array (PBGA)
1 PCI Express* reduced power-state "L0s" is not supported.

2 In an x4 DDR memory device, the Intel® x4 Single Device Data Correction (x4 SDDC) provides error detection and correction for 1, 2, 3 or 4 data bits within that single device and provides error detection, up to 8 data bits, within two devices.


For more information on performance tests and on the performance of Intel® products, visit www.intel.com/performance/resources/benchmark_limitations.htm.
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