|
An erratum affecting PCI Express* slot capabilities has been found in the Intel® E7520 server chipset during testing and is root caused. Please reference Intel® E7520 MCH Specification Update Erratum #23: "Transposed Interrupt Messages across Hub Interface Erratum" for a complete description of the MCH errata. The Intel® Server Board SE7520JR2 is affected by this erratum.
Intel Server Board SE7520JR2 based systems running with a single processor thread and operating in legacy PIC mode or virtual wire Mode A may hang under high I/O-driver interrupt stress. For systems operating in full APIC mode where the number of virtual interrupt line (intA, intB, etc.) used by all PCI-Express* adapters in a system exceeds the number of logical processors (threads), the system may hang.
Technical Advisory 706 [PDF]
File Name: ta7061se7520jr2mchpublic.pdf
Size: 96,538 bytes
Date: August 2004
File Revision: TA-706-1
Note: PDF Files require Adobe Acrobat* Reader†
† This link will take you off of the Intel Web site. Intel does not control the content of the destination Web Site.
This applies to:
| 
