How do Intel® Centrino® Processor Technology-based systems deliver high performance, even at relatively lower frequencies?
There are many ways to influence a system's performance, one of which is the processor's MHz. Intel® Centrino® Processor Technology benefits from a unique micro-architecture, optimized for the mobile segment, to deliver breakthrough mobile performance with low power characteristics through efficient execution and advanced power-saving techniques.
The design focuses on three main areas, efficient execution engine, enhanced data bandwidth and advanced power control. This combination delivers the outstanding mobile performance that you ordinarily might associate with higher MHz, but at much lower power consumption. MHz remains the relative measure of goodness within each architectural family.
Examples of 'Efficient Execution' include, Advanced Branch Prediction, Micro-Ops Fusion & Dedicated Stack Manager, 'Enhanced Data Bandwidth" includes Larger 1MB Cache, High Performance PSB, and Advanced Pre-Fetch Logic, while example of 'Advanced Power Control' include fine grain Aggressive Clock Gating, and Enhanced Intel SpeedStep Technology.
It seems that Intel is changing the way it measures performance (not leading with MHz), what can you tell me about this?
Megahertz (clock speed) is only one aspect of performance in PC platforms and remains a reliable measure of relative performance within each architecture family. For example: Intel Centrino mobile technology at 1.60 GHz outperforms an Intel Centrino mobile technology at 1.30 GHz. Examples of factors that influence platform performance are CPU architecture and frequency, usage models, software applications, BIOS and different types of memory.
Intel believes that for mobile PCs, benchmarks that simultaneously measure battery life and performance are the best indicator of the real end-user experience. MobileMark* 2002 is a benchmark used to evaluate laptop PC user experience by measuring both performance and battery life at the same time on the same workload. MobileMark* 2002 is a tool that measures laptop PC performance on popular business-oriented applications in the Microsoft* Windows operating environment. The productivity usage model provides computations representing today's business users using popular office productivity and content creation applications. This usage model reports a performance score and a battery life score.
Please visit http://www.intel.com/performance/ for more information on MobileMark* 2002 benchmark information, including comparisons between Intel Mobile Processors or Intel® Centrino® Processor Technology.
If Intel® Celeron® M processors and Intel® Centrino® Processor Technology are both part of Intel's mobility family, what are the differences?
Intel® Centrino® Processor Technology represents a combination of Intel's best mobile technologies (Intel® Pentium® M processor, Intel® 855 chipset family or Intel 915 chipset family, and Intel® PRO/Wireless 2100, 2200BG, or 2915ABG network connection) delivering all four vectors of mobility: performance, integrated wireless, enables great battery life, enables thinner/lighter form factors.
The Intel® Celeron® M brand represents only the Intel® Celeron® M processor. Designed for mobility, the Intel® Celeron® M processor delivers exceptional value with a balance of mobile processor technology enabling thinner and lighter systems.
How is the Intel® Celeron® M processor different from the Intel® Pentium® M processor?
The Intel® Pentium® M processor is designed, tested and tuned for mobility, including breakthrough mobile performance, enabling great battery life, enabling sleeker, lighter laptop designs.
The Intel® Celeron® M processor delivers a balanced level of mobile processor technologies mobile performance, lower voltage enables sleeker, lighter laptop designs at an exceptional value.
For more information see the processor comparison table.
What is Micro-Ops Fusion?
Micro-Ops Fusion is a technology that uses fewer CPU resources to execute operations than traditional microprocessors by merging CPU operations together prior to execution in order to increase performance and efficiency. When the micro-operations are fused they use less processor resources in order to handle the same number of operations. Two fused micro-operations occupy a single resource and thus they make the machine behave as a wider machine. Micro-ops fusion delivers efficiency in both performance and power management.
Analogy: A taxi pooling multiple riders into a single trip to save time and energy.
What is Advanced Instruction Prediction?
Advanced instruction prediction is a technology that allows the processor to study the past behavior of programs and intelligently anticipate what instructions will be needed next. The processor can line up instructions for execution before a program requests them. By anticipating changes in program flow rather than merely responding to them, the processor improves performance and efficiency. Predicting branches correctly is one of the areas of high leverage for both performance and power. On top of the standard Bi-Model/Global predictor the processor also includes a loop detector and an indirect branch target buffer.
Analogy: A word processing program that completes a word after you type the first few letters, improving speed and efficiency.
What is the dedicated stack manager?
The dedicated stack manager significantly reduces the number of micro-operations required for the "overhead" of stack management inside the processor. Traditional processors repeatedly interrupt program execution to maintain their own internal accounting. Processors with a dedicated stack manager use sophisticated, specialized-hardware enabling the processor to execute program instructions without interruption, using less power.
Certain instructions use the architectural stack as source of operands. In those instructions there's an overhead work of managing the stack on top of the actual operation that needs to occur. Typically those overhead operations are done using the main machine flow which is a very inefficient way from both power and performance perspective. There are advanced synchronization mechanisms that make sure that the stack pointer value is visible to the software just when it's needed.
What is the power-optimized processor system bus?
The power-optimized processor system bus remains powered down until it senses incoming data form the chipset, allowing to the processor to consume less power. In a typical microarchitecture, a processor has its bus turned on even when it is not in use. With the Pentium M processor and Celeron M processor, portions of the bus are turned on only when they are needed. Architectural and circuit innovations enabled this power-optimized processor system bus technology which lowers power through reduced voltage swing and tighter buffer management.
What is intelligent power distribution?
Most machines employ some level of hardware clock gating to reduce power consumption. Pentium M processor and Celeron M processor implements finer granularity hardware gating mechanisms that allows turning on hardware units partially based on program demand.
Analogy: A motion sensor that turns lights on when you enter a room and shuts them off when you exit.
What is the large, power-aware Secondary Cache?
The Pentium M processor includes a 1MB or 2MB secondary cache and Celeron M processor includes 512K or 1MB secondary cache. The large cache allows a significant reduction in memory data latency providing a big performance improvement. The power-aware cache implements several features to reduce cache power consumption. Traditional microprocessors run the cache as fast as possible, the processor cache on the processor runs slightly slower to save energy and cut down on electricity leakage enabling longer battery life. Special circuit and micro-architectural innovations were implemented in order to reduce power consumption. For example the cache unit keeps track of the last entry that was accessed such that repeating accesses to the same location will not have to lookup the array, thus eliminating a high power operation.
What is deeper sleep alert state?
Deep Sleep and Deeper Sleep Alert States are very low power states the processor can enter during periods of inactivity while still maintaining its context. The Deeper Sleep Alert State is functionally identical to the Deep Sleep Alert State but at a significantly lower voltage providing added benefits of power savings and longer battery life. The Deeper Sleep Alert State is automatically enabled on the platform through the I/O Controller Hub component and the voltage regulator, so there is no user interaction required. This feature maintains processor performance characteristics while taking advantage of the increased power savings.
What is Enhanced Intel SpeedStep® Technology with Multiple Voltage / Frequency Operating Points?
Mobile Intel Pentium 4 Processor-M supports Enhanced Intel SpeedStep® technology allowing the processor to switch between only two core performance frequencies.
Intel Pentium M processors add new capabilities to Enhanced Intel SpeedStep technology with multiple voltage / frequency operating points. This means that dynamic transitions will happen at smaller intervals between the Battery-Optimized mode (lowest voltage / frequency) and the Performance-Optimized mode (highest voltage / frequency), enabling higher performance and lower power for each workload. With dynamic switching capability mobile systems can switch between the multiple operating points based on CPU utilization, without user intervention. The result is that the user observes higher performance and extended battery-life automatically. Enhanced Intel SpeedStep technology with multiple voltage / frequency operating points enables optimum performance at the lowest power whether connected to AC or Battery Power, resulting in a better user experience with no battery life degradation.
Explain the latest mobile packaging technology.
Flip-chip packaging eliminated the wire-bond approach in favor of mounting the die directly to a substrate, improving power delivery and reducing impedance.
The mobile Micro-FCPGA (micro flip chip pin grid array) and Micro-FCBGA (micro flip chip ball grid array) packaging technology provides significant improvements in power delivery and pin inductance compared to their predecessors resulting in dramatically improved performance. The packages incorporate separate power and ground planes and on-package capacitance needed at higher speeds - reducing board space for the implementation. Space savings contribute to smaller designs and more mobility.
What is streaming SIMD extensions 2 (SSE2)?
The microarchitecture includes the new extensions to SIMD capabilities that MMX™ technology and SSE technology delivered by adding 144 new instructions. These instructions include 128-bit SIMD integer arithmetic and 128-bit SIMD double-precision floating-point operations. These new instructions reduce the overall number of instructions required to execute a particular program task and as a result can contribute to an overall performance increase. They accelerate a broad range of applications, including video, speech, and image, photo processing, encryption, financial, engineering and scientific applications.
This applies to:
| 
