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Technology with the Environment in Mind
Materials Technology for Environmentally Green Micro-electronic Packaging
AUTHORS’ BIOGRAPHIES
Mukul Renavikar
Mukul Renavikar is a Senior Packaging Engineer in the ATTD-Materials group. He has been with Intel for over four years and leads the Metallurgy/Materials Core Competency group in Assembly and Test Technology Development (ATTD). Mukul received his Bachelor's degree in Metallurgy from the College of Engineering, Pune, and M.S. and PhD degrees in Materials Science from the University of
Pittsburgh, PA. His e-mail is mukul.p.renavikar at intel.com.
Neha Patel
Neha Patel is a Senior Materials Engineer in the ATTD group. She has been with Intel for three years and has worked extensively in the area of first-level interconnect polymer materials and thermal interface materials. She obtained her bachelors degree in Physics from St. Xaviers college, Bombay and M.S. and PhD degrees in Physics from Case Western Reserve University Cleveland, OH.
Her e-mail is neha.m.patel at intel.com.
Ashay Dani
Ashay Dani obtained his B.S. degree in Chemical Engineering from UDCT, Bombay, India and a PhD degree in Chemical Engineering from Clemson University. Ashay joined Intel in 2000 and has managed several packaging materials and suppliers' technology
development, certification and ramp. His e-mail is ashay.a.dani at intel.com.
Vijay Wakharkar
Vijay Wakharkar is a Principal Engineer in ATTD and has worked at Intel for 17 years. Vijay got his Bachelors degree from the College of Engineering, Poona in 1982 and his PhD degree in Materials Science and Engineering in 1988. Prior to joining Intel, he spent two years as a Post Doctoral Fellow at IBM Almaden Research Center in the Polymer Materials Division. Currently he is
responsible for managing the development and path-finding of materials technologies that end up in ATTD's packaging solutions.
Vijay was one of the founding editors of the Intel Assembly Technology and Test Journal (IATTJ) and also serves on Intel's
Thermo-mechanical Patent Committee. His e-mail is vijay.s.wakharkar at intel.com.
George Arrigotti
George Arrigotti is the compiler and editor of the Pb-free Board Assembly MAS, which is a materials and process reference document for customers. He works in ATTD Customer Technology and Manufacturing. He is currently the Initiative Development Team
leader for High-Bandwidth Digital Content Protection (HDCP), helping customers prepare their designs and manufacturing for Blu-ray and HD DVD. George joined Intel in 1979 and has held a variety of board-related positions, including board design, product
engineering, test engineering, manufacturing technology development, and customer manufacturing enabling. He earned his B.S.
degree in Electrical Engineering from Gonzaga University in Spokane, Washington, and his M.S. degree in Computer and Electrical
Engineering from Oregon State University in Corvallis, Oregon. George is a member of IEEE, has served as a Segment Roadmap
Champion for NEMI, and holds ten Intel patents. His e-mail is george.arrigotti at intel.com.
Vasu S. Vasudevan
Vasu S. Vasudevan graduated from Purdue University with a PhD degree in Materials Engineering. He is a quality and reliability engineer for board-level technologies and he has been working in Intel for the last seven years. He is primarily involved in
board-level reliability assessment including package-to-board interaction for new technologies. He is also responsible for
proliferating Pb-free reliability standards, techniques, and new learnings to industry as needed. He has been working in the area
of electronic manufacturing and technology development for more than 14 years. He has more than 30 technical publications and
holds two patents. He is an active member in IPC and iNEMI. His e-mail is vasu.s.vasudevan at intel.com.
Omar Bchir
Omar Bchir is a Senior Packaging Engineer in the substrates pathfinding group with Intel-ATTD, and he has been with Intel for over three years. His focus areas have been metallization, integration, and HF enabling. Omar obtained his Bachelor's degree in Chemical Engineering from the Georgia Institute of Technology in 1997 and his PhD degree in Chemical Engineering from the
University of Florida in 2004. His e-mail is omar.j.bchir at intel.com.
Amruthavalli Pallavi Alur
Amruthavalli Pallavi Alur is a Senior Packaging Engineer in the substrates pathfinding group with Intel-ATTD, and she has been with Intel for two years. Her focus area includes Mechanics of Materials and HF enabling. Pallavi obtained her Bachelor's degree in Metallurgy and Materials Sciences from the Institute of Technology (India) in 2000 and her PhD degree in Materials Science and
Engineering from Brown University in 2005. Her e-mail is amruthavalli.p.alur at intel.com.
Charan Gurumurthy
Charan Gurumurthy manages ATTD's substrate pathfinding group and has been with Intel for over five years. Before joining Intel, he worked at IBMs Microelectronics Division in Endicott, NY. Charan obtained his Bachelor's degree in Mechanical Engineering from the Indian Institute of Technology in 1994 and his PhD in Materials Science and Engineering from Cornell University in 2000. He has 30 + patents awarded/filed and 10+ journal publications. He currently serves as "Associate Editor" of IEEE Transactions on Advanced Packaging and is a senior member of IEEE. His e-mail is charan.k.gurumurthy at intel.com.
Roger Stage
Roger Stage has a PhD degree in Mechanical Engineering from Arizona State University. Dr. Stage manages package quality and reliability engineering in Intel's Assembly Technology Development Quality & Reliability organization in Chandler, Arizona. His e-mail is roger.w.stage at intel.com.
In this article
- Abstract
- Introduction
- PB-Free Initiative: First Level Interconnect Materials (FLI)
- PB-Free Initiative: Second Level Interconnect Materials (2LI)
- PB-Free Initiative: Solder Thermal Interface Materials (STIM)
- Halogen-Free Packaging Materials Initiative
- Conclusion
- Acknowledgments
- References
- Author's Biographies