Intel's 0.25 Micron, 2.0Volts Logic Process Technology (continued)


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Acknowledgments/References

Acknowledgments
Many people contributed to the results discussed in this paper. Key people include Max Wei, Brian Johnson, Maurice DeCourcy, Domenic Pipitone, Karen Lubic, Brett Huff, Haiping Dun, Sam Hu, Bill Kavanaugh, Yung-Huei Lee, Wallace Lin, Steven Soss, Andrew Stack, John Mardinly, Li-Jia Ma, K.C. Patel, Tom Castro, Nevine Malek, Mike Maxim, Melinda Hoppe, and Ajay Chatterjee. In addition to those mentioned, we acknowledge the contributions of many others from the CTM, PTD, and virtual factory module and integration groups.

References
[1]       M. Bohr, Y. El-Mansy, "Technology for Advanced High-Performance Microprocessors," IEEE Transactions on Electron Devices, March 1998, pp. 620-625.

[2] S. Wolf, Silicon Processing for the VLSI Era, Volume 3: The Submicron MOSFET.

[3] M. Bohr, S.S. Ahmed, S.U. Ahmed, M. Bost, T. Ghani, J. Greason, R. Hainsey, C. Jan, P. Packan, S. Sivakumar, S. Thompson, J. Tsai, and S. Yang, "A High Performance 0.25um Logic Technology Optimized for 1.8V Operation," IEDM Technical Digest, 1996, pp. 847-850.

[4] S. Venkatesan, A. Gelatos, B. Smith, R. Islam, et.al., "A High Performance 1.8V, 0.20um CMOS Technology with Copper Metallization," IEDM Technical Digest, 1997, pp. 769-772.

[5] M. Chang, J. Ting, J. Shy, L. Chen, "A Highly Manufacturable 0.25 um Multiple-Vt Dual Gate Oxide CMOS Process for Logic/Embedded IC Foundry Technology." 1998 Symposium on VLSI Technology Digest, pp. 150-151.

[6] J, Schutz, R. Wallace, "A 450MHz IA32 P6 Family Microprocessor," ISSCC Technical Digest, 1998, p. 236-237.




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