Flip-Chip Technology on Organic Pin Grid Array Packages (continued)


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SUBSTRATE DEVELOPMENT OVERVIEW

Photolithography and etch have been the most prevalent methods to create blind µ-vias in high-density substrates. The photolithography process has two main disadvantages. First there is the limitation to the µ-via diameter due to the limited resolution of commercial photosensitive materials. Second, photosensitive materials are prone to reliability issues with their mechanical properties, moisture absorption, and the value of the dielectric constant. Laser µ-via drilled into an "off the shelf" dielectric can overcome these limitations.

Laser technology can potentially create via sizes down to the < 10 µm range, while today's photolithography materials are limited to 50-60 µm vias. Another plus is that the smaller the via size, the lower the cost of the laser µ-via formation due to a shorter pulse time. In addition, by eliminating photosensitive resins, a large number of non-photo sensitive materials can be considered for dielectric material. The laminate material used in FCPGA is a commercially available film, which is lower in cost when compared to the dielectric materials used in other photo µ-via based packages.

In the FCPGA package, the laser drill via technology was implemented in spite of the fact that the line/space design rules were not as challenging as the existing Organic Land Grid Array (OLGA) technology. The rationale was to save money on processing costs, while taking advantage of the higher routing density resulting from the smaller µ-via pads. By using laser vias instead of photo vias, the FCPGA package had access to cheaper and better commercially available dielectric materials. Figure 6 shows a schematic of the laminates and materials used in the FCPGA.

Figure 6: Schematic of FCPGA laminates and materials

Comparing FCPGA with the previous OLGA package, there are several distinct differences:

  1. FCPGA uses laser vias instead of photo vias, and SMT pins.

  2. The size of the FCPGA package is larger with additional area for chip caps.

  3. Commercially available dielectric and solder-resist materials are used in the FCPGA package.

  4. µ-via is used on PTH in the FCPGA package.




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