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FUTURE DEVELOPMENTS

The next generation of FCPGA package design rules have been defined and are currently under development. The performance enhancements in the new FCPGA2 package will be achieved with finer feature sizes (including bump pitches, Cu trace width and spacing, PTH size, stripline, etc.) and the addition of some new features (such as stacked vias and via-in-via). In addition, power delivery and removal capabilities will be improved through better decoupling capacitance and the use of a highly conductive package lid.