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Intel® Platform Memory Validation, specifications and results
The objective of the Intel validation program for DDR, DDR2, and DDR3 is to verify SDRAM compliance to Intel specifications for and performance of supported DDR memory modules in Intel reference systems. The results of validation procedures provide a guideline for memory compatibility with Intel chipsets.
This validation, performed by approved test labs on small samples of components and modules, is intended to demonstrate supplier design and manufacturing capability.
The validation process uses standardized procedures and methodologies documented in the Intel validation procedure for DDR, DDR2, and DDR3. For a copy of the procedure, contact the test lab. This documented procedure is not intended to replace the normal product qualification process.
Latest validation updates
Validation results
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DDR3 DRAM components
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- DDR3 1333/1066/800MHz DRAM component-level validation results
Results of a small sample of DDR3 DRAM components tested using Verigy 93000 Tester and Vector Network Analyzer.
- DDR3 1333/1066/800MHz DRAM component-level validation results
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DDR3 RDIMM
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- Intel® Xeon® processor 5500 series (codenamed Nehalem) DDR3 DIMMs system-level validation results
1333/1066/800 Registered DIMMs tested on Intel® server reference platforms using Intel® Xeon® processor 5500 series (codenamed Nehalem).
- Intel® Xeon® processor 5500 series (codenamed Nehalem) DDR3 DIMMs system-level validation results
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DDR3 ECC UDIMM
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DDR3 Non-ECC UDIMM
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- DDR3-1333 Non-ECC UDIMM 2DIMM/ch validation results (codenamed Lynnfield)
- Intel® Core® i7 DDR3 Non-ECC Unbuffered DIMM system-level validation results
1333/1066/800 MHz Unbuffered Non-ECC DIMMs tested on Intel® X58 Chipset based reference platform(s).
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DDR3 SODIMM
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- DDR3 1333 Non-ECC SODIMM 1DIMM/ch validation results (codenamed Clarksfield)
- DDR3 800/1066 MHz Unbuffered SODIMM system-level validation results
Results of a small sample of DDR3 Unbuffered SODIMMs tested on reference platform(s).
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Validation procedures
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- Overview
The objective of the validation process is to enable a smooth and quick integration of DDR2-based systems. - DIMM validation process
The objective of the Intel validation program for DDR, DDR2, and DDR3 is to verify DDR SDRAM compliance to the Intel specifications for DDR/DDR2/DDR3 and performance of DDR/DDR2/DDR3 DIMM modules in Intel reference systems, so as to provide a guideline for memory compatibility with Intel chipsets.
- Overview
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